Heavy ion‑induced MCUs in 28 nm SRAM‑based FPGAs: upset proportions, classifications, and pattern shapes

Shuai Gao · Xin‑Yu Li · Shi‑Wei Zhao · Ze He · Bing Ye · Li Cai · You‑Mei Sun · Guo‑Qing Xiao ·Chang Cai · Jie Liu

Abstract For modern scaling devices, multiple cell upsets (MCUs) have become a major threat to high-reliability field-programmable gate array (FPGA)-based systems. Thus, both performing the worst-case irradiation tests to provide the actual MCU response of devices and proposing an effective MCU distinction method are urgently needed. In this study, high- and medium-energy heavy-ion irradiations for the configuration random-access memory of 28 nm FPGAs are performed. An MCU extraction method supported by theoretical predictions is proposed to study the MCU sizes, shapes, and frequencies in detail. Based on the extraction method, the different percentages, and orientations of the large MCUs in both the azimuth and zenith directions determine the worse irradiation response of the FPGAs. The extracted largest 9-bit MCUs indicate that high-energy heavy ions can induce more severe failures than medium-energy ones. The results show that both the use of high-energy heavy ions during MCU evaluations and effective protection for the application of high-density 28 nm FPGAs in space are extremely necessary.

Keywords FPGAs · Heavy ions · Multiple cell upsets · Extraction · Worse irradiation

1 Introduction

Static random-access memory (SRAM)-based field programmable gate arrays (FPGAs) are sensitive to radiationinduced single event upsets (SEUs) [1—3]. Single-bit upsets(SBUs), as a well-known effect in FPGAs, occur when single particles (such as heavy ions) deposit energy that exceeds the critical charge in single memory cells. However, in modern advanced process technologies, owing to the smaller area and decreased critical charge of transistors, single particles can affect more than one memory cell simultaneously in the physical layout to generate clustered errors, that is, multiple cell upsets (MCUs) [4]. MCUs have become a catastrophic factor that threatens the safety of FPGAs applied in aerospace missions [5, 6]. Particularly, as the feature size of transistors continuously shrinks to the nanoscale, the proportion of MCUs in FPGAs increases dramatically [7, 8]. When MCUs occur in critical configuration RAMs (CRAMs) that control the entire functions of FPGAs, an abnormal state of the on-orbit systems may occur. Therefore, it is crucial to study the impact of MCU on CRAMs to guarantee the safety of critical electronic components in aerospace missions.

Although fault injections can simulate MCU information, irradiation tests are closer to the actual space environment to study the influences of MCUs on circuits because of the actual ion-induced charge generation process [9, 10].Heavy ions of various energies are typically utilized in irradiation tests. Therefore, the required energy range must be specified. The medium-energy range is defined as 1—10 MeV per nucleon [11]. Beams that reach 10—100 MeV/n and 5—150 GeV/n are considered to be high-energy and ultrahigh-energy beams, respectively [12]. For ground-based accelerator evaluations, medium-energy heavy-ion irradiation under vertical incidence is typically utilized. However,high-energy heavy ions existing in the space environment[13] have recently promoted the MCU investigations. The results in [14] showed that compared to medium-energy heavy ions, ultra-high-energy heavy ions with the same ionization ability can induce larger-scale MCUs in 28 nm FPGAs, indicating that the energy of heavy ions significantly affects the size of MCUs, but the ionization ability was relatively small (3.7 MeV/(mg/cm2)). Because high-energy heavy ions have considerably higher ionization ability than ultra-high-energy heavy ions, they would generate larger proportions and sizes of MCUs that significantly threaten the safety of FPGAs. Additionally, based on medium-energy heavy ions, the tilted irradiation tests in [15] demonstrated more serious MCU effects on nanoscale FPGAs. When considering tilted high-energy heavy ions, considerably larger MCUs may appear in nanoscale FPGAs, compared with medium-energy heavy ions with a higher ionization ability. Unfortunately, no study has been conducted on irradiation tests with high-energy heavy ions to demonstrate the worse MCU effects of the high ionization ability on 28 nm FPGAs. Although [16] performed more serious irradiation tests in different directions with medium-energy heavy ions for Kintex-7 FPGAs, detailed MCU patterns and sizes were not provided. Hence, systematic studies including worse MCU characterizations and effective MCU discriminations are necessary to determine the more serious MCU influences and support the process of radiation-hardened designs.

In contrast to the standard modular structures of SRAMs,the complex layout arrangement of CRAMs with different sensitive node distances may induce diverse MCU features, leading to an accurate distinction between MCUs in CRAMs much difficult [17]. Additionally, the complicated interleaved schemes used to mitigate MCUs make it unfeasible to discriminate between MCUs [18]. Although the distinction between the SBU and MCU data can be achieved by controlling the flux of the ion beams and performing microbeam scanning [19, 20], the time and cost consumed are non-negligible. Additionally, there exists an inexpensive method named “statistical analysis,” which classifies MCUs by XORing flipped pairs, but it is not appropriate for the modular separated FPGA architecture [21, 22]. Besides,[17] presented a statistical MCU extraction from FPGAs according to the abnormous relationships between upset addresses, but it lacked theoretical support. In [23], although the authors extracted MCUs with the help of a Monte Carlo simulation and theoretical prediction, there was no further explanation of the relationships between upsets satisfied when MCUs were extracted. Therefore, there is an urgent need to propose a convincing and effective MCU extraction method for representative FPGA-based systems to determine the impact of MCUs.

In this study, systematic heavy-ion irradiations on 28 nm SRAM-based FPGAs were performed to determine the worse MCU response of devices, and an improved MCU extraction method was proposed to study the MCU features.With detailed MCU information, we identified the worse impacts of high-energy heavy ions than medium-energy ones and different MCU features under various irradiation conditions. This paper is organized as follows. In Sect. 2,we introduce the irradiated devices, test system, and experimental information. The detailed MCU extraction process,results, and discussion are presented in Sect. 3. Finally, we present our conclusions.

2 Experimental setup

2.1 Devices under test

High-performance Xilinx XC7K325T FPGAs were chosen as the devices under test (DUTs), which have been widely used in cost-sensitive applications to achieve high-end connectivity, bandwidth, and signal processing capability [24].A 28 nm bulk silicon process with a high-k metal gate was utilized in the DUT. All programmable routings or switches in the DUTs are controlled by CRAMs, which can achieve complex functions to satisfy the requirements of different space missions after rational configurations.

The CRAMs are formally arranged into “frames” (rows)and “bits” (columns) for Xilinx families, and the specific functions can be realized by configuring the customized bitstreams generated by the Vivado software into the CRAM part. The DUT has 22,546 frames (including seven dummy frames) and 72,846,048 bits (i.e., 101 32-bit words for each frame). All frame data can be read back and compared with the golden bitstream, and the error data, as well as the logical locations (frame# and bit#), are extracted after the comparisons.

2.2 Test system

A test system was developed to capture the irradiation vectors of the DUT. The test system consisted mainly of a motherboard and daughterboard. The DUT on the daughterboard was irradiated during the tests. The main control FPGA soldered on the motherboard was responsible for reading the contents of the DUT, transmitting commands,and identifying functional failures. Both the motherboard and daughterboard need a 12 V DC power supply. The highspeed interface was utilized to connect the two boards, and the configuration time was less than 0.5 ms. Additionally,we designed software on the host computer to control the test system. After the beam is turned off, the motherboard executes bitstream comparisons and uploads the results to the main control FPGA. The detailed information on the upsets and types of hard errors were captured and saved as log files for further analysis.

2.3 Irradiation parameters

Irradiation tests were performed at the Heavy Ion Research Facility in Lanzhou (HIRFL) at the Institute of Modern Physics, Chinese Academy of Sciences. High-energy78Kr ions and medium-energy129Xe ions were used to irradiate the DUT. The129Xe ions were accelerated using a sector separator cyclotron. The78Kr ions were from the cooling storage ring (CSR), and this was the first available high-energy single-event experiment of the CSR heavyion accelerator. To meet the ion range requirement, the substrate of the DUT was thinned to approximately 50 μm.It should be noted that the tests were performed under the nominal temperature (20 ℃). The standard core voltage of the DUT was 1.0 V. Moreover, several aluminum foils were used to achieve multiple linear energy transfer (LET)values. The DUT was fixed on a 5-dimensional platform to change its position and rotate the tilts (θ,ψ), as shown in Fig. 1.

Fig. 1 Ion beam with azimuth angle θ and zenith angle ψ incident on the DUT surface

Additionally, many testing trials were performed at a low fluence to reduce the occurrence of MCUs induced by several heavy ions, and the detailed explanations are presented in the next section. The experimental conditions and parameters are listed in Table 1. In both the78Kr and129Xe experiments, the number of upsets in each run was controlled at less than 400. Any trials with upsets exceeding 400 were discarded from the dataset. In our testing scheme, static modes were used to radiate the DUT. The static modes start with the configuration of our DUT with a bitstream and then with the beam on. During the radiation tests, the circuits inside the DUT do not work because the static modes do not rely on clock driving. Heavy ions only affect the configuration functionality of the circuits,that is, the CRAM cells. After reaching the preset heavyion fluence, the beam was turned off, and the radiated and golden bitstreams were compared to identify the upsets. To date, only a single testing trial has been completed. Before the next static trial, the configuration must be restarted to restore the functionality of the DUT. By repeating this operation, multiple trial results were obtained. Static modes have the benefit of preventing undesired occurrence of functional errors and mitigating the rates of burst errors during the reconfiguration process [25], which improves the efficiency of our MCU extractions. The heavy-ion testing platform of HIRFL can achieve accurate flux as well as control the preset fluence.

Table 1 Detailed experimental information

3 Results and discussion

During data analysis, several consecutive upsets of almost 16 bits in the same frame were observed and were identified as being caused by micro-functional failures [17]. Because these abnormal upsets interfere with the real MCU results,before the MCU extraction, they were removed from the collected upset data.

3.1 FMCUs

“False MCUs (FMCUs)”, typically defined as MCUs induced by several particles rather than single ones, significantly affect the determination of correct MCU results.Therefore, before irradiation tests, it is necessary to propose a test principle that prevents the occurrence of FMCUs as much as possible.

According to [26], the probability of FMCUs can be

In this equation,pis the number of upsets in each radiation test,kis the collision range, which was set to 32 (the length of a word in the Kintex-7 FPGA), andnis the number of bits in one specific memory. It can be observed that the probability of the FMCUs depends only on the number of upsets. Equation (1) shows that when there are a few upsets, the probability of the FMCUs can be sufficiently low.This is the reason why we separated our tests into multiple rounds as illustrated in Sect. 2.3. A more specific approach to obtain as few upsets as possible is to control the fluence of the heavy ions in each round of the radiation test. In the analysis of the upsets, the minimum and maximum numbers of upsets were 86 and 272, respectively. Based on Eq. (1),the minimum and maximum probabilities of the FMCUs in our radiation designs were approximately 0.3% and 3.0%,respectively, which proved the statistical property of this calculation.

3.2 MCU extraction

MCUs can be extracted by determining the differences in the positional relationships between the actual upset data and theoretical predictions. Therefore, the first important task was to create a predictive model. In this model, only SBUs exist, referred to as only-SBU systems [22], where the relationships between single upsets show a specific frequency distribution. However, the actual radiation violates the above assumptions because heavy ions can affect more than one cell simultaneously to generate the MCUs. The charge-sharing effect is another essential factor in MCU generation. More specifically, because MCUs are generated by single particles, there must be a certain rule between the upsets because it is determined by the statistical spatial and temporal nature of the ion beams and the specific MCU sensitivities of devices. Hence, the relationships between the real upsets must exhibit different frequencies from the theoretical only-SBU predictions; that is, the relationships appearing more frequently than the predictive ones can be identified as being caused by the MCUs.

Before constructing the predictive model, we first assume that there is a rectangular space of lengthXand widthY, and this space containsNelements, whereNis equal toX×Y.The elements in this space can be included by a set namedR, whereR= {A1,A2,A3, …,AN}, andAiis theitharbitrary element inR. Each elementAiin this space has its unique coordinate representation, labelled as (xi, yi) formally like a position in theX–Yplane. Hence, the coordinates of all elements in this space can be defined from the bottom left (1,1) to the top right corner (X,Y).

In fact, there are specific relationships between the elements in this space. To identify the relationships between them without repetition and loss, we should first organize them in increasing order, and the principle is given by.

Subtraction can be used to determine the unique relationships among these elements. Hence, we can formally obtain several offsets, such as (Δx, Δy). We then define a set named the offset set (OS) that contains all these offsets.It is worth noting that the Δxof each offset in the OS must be equal to or greater than 0, and the contents of the OS can be determined by

To illustrate the subtraction process more clearly, we used a 2 × 3 array namedSas an example. The coordinates of all the six elements and their subtracted offsets are listed in Table 2.

In the example illustrated above,XandYare selected as 2 and 3, respectively. We then return to the Kintex-7 FPGA.As illustrated in Sect. 2.1, the CRAM bits are arranged in rows and columns in the Xilinx FPGAs. Therefore, in theN-bit CRAM space mentioned above,XandYwere 22,539 and 3232, respectively. Using Eq. (2), we can infer that theranges ofxandyof the offset (x,y) are from 0 to 22,538 and-3231 to 3231, respectively, and they are both integers. The offsets (x,y) in theN-bit CRAM space are arbitrary combinations of allxandywithin the above ranges; however, these offsets must meet the increasing order rules exactly atx= 0.Thereby, there is a total ofN(N-1)/2 offsets with repetition.For an arbitrary offset (x,y), the probability that it appears in the OS is determined by

Table 2 Results of the calculated offsets in a 2 × 3 array

After each radiation test,Nuupsets (Nu<

In our predictive model, because we assume that these upsets are irrelevant to each other, the probability of an arbitrary offset (x,y) appearingmtimes in the totalNOStrials can be calculated using the classical binomial probability distribution

To ensure that the extracted MCUs have more than 95%confidence, we set 0.05 as the maximum value of Eq. (6) to determine the cut-down value, labelled asm.

We illustrate the above extraction process using an example. In the case of the Kintex-7 FPGA, based on Eq. (2)and Eq. (3), we can first determine the probabilities of all offsets {(0, 1), (0, 2), …, (0, 3231), (1, − 3231), (1, − 3230),…, (1, 3231), (2, —3231),…, (22,538, 3231)}. After a single radiation test, we observed 214 upsets, and theNOSwas 22,791. According to Eq. (5), we can determine the probabilities of all the actual obtained offsets (those offsets are absolutely the subset of the above offsets) that are in the new OS appearingmtimes. We then sum the above probabilities of all offsets multiplied by their appearing times in an individual test round to determine the number of offsets appearingmtimes. By letting the left-hand term in Eq. (6)be equal to 0.05, we obtain a cut-down value. In this case,the cut-down valuemwas 2.9. Thus far, we have completed the single process of obtaining one cut-down value. Then,a question arises: How do we identify the offsets that are caused by MCUs? The answer is that offsets that emerge more frequently than 2.9 times are extracted as true offsets that are induced by MCUs, because they violate the irrelevance between upsets, that is, only-SBU theoretical prediction. By repeating the above process, we obtain many cut-down values, which rely on the number of rounds of the static tests performed. However, if we carry out too many rounds of tests, the calculation and comparison processes are bound to be huge. To address this problem, two rules are defined below to make MCU extraction more convenient and accurate.

A.Cut down rule

This rule helps extract the MCUs more conveniently.Because of the specific physical layout arrangement and the MCU sensitivities of devices, after the cut-down values of all the testing rounds are confirmed, these values and the occurrence numbers of the same offsets obtained from multiple rounds can be added separately to create a histogram containing all the possible offsets. Taking two rounds of radiation tests as an example, their cutdown values are calculated to be 2.9 and 3.1, and off-set (1, 0) occurs 30 and 39 times, respectively. We can then add them separately. Finally, the cut-down value is 6.0, and the offset (1, 0) occurs 69 times. Based on this rule, the offset results of the78Kr and129Xe irradiations are shown in Fig. 2. Offsets that occurred above the cut down (dashed red and blue lines in Fig. 2) were identified to discriminate the MCUs, and the remaining offsets were discarded.

Fig. 2 (Color online) Results of offsets caused by 78Kr and 129Xe ions

Table 3 Statistical offset results for the occurrence numbers of logical upset offsets that do not exceed the cut-down value

B.Repetition rule

Here, we define another principle called the repetition rule. This rule is available for offsets that do not exceed the cut-down value. For example, during the analysis,some exclusive MCUs presented in Table 3 appeared at least 2 times in an individual round. Because the probability of the same-shape MCUs appearing more than two times can be calculated to be very low, the offsets marked in red were reconsidered and added to the true offset group. This rule helped recover anomalous offsets that were not in the OS, as confirmed by the cut down rule.

MCU extraction begins with the construction of 2-bit MCUs; then, the larger MCUs need to be further identified based on the 2-bit MCU results by determining if the off-sets between them are included in the confirmed OS. This procedure is iteratively performed until the offsets of the maximum MCUs go against the OS.

3.3 Results analysis

Figure 3 shows the detailed SBU and MCU results of the78Kr and129Xe irradiation tests. For the78Kr ions, the crosssections of the SBUs and MCUs were almost the same.However, the MCUs dominated the129Xe ion-induced upsets, which demonstrated a high-energy deposition ability and a strong charge sharing effect of the129Xe ions. Moreover, for both tests, significant increases in the cross-sections of the angular irradiations were observed, indicating that the different ion trajectories can affect the MCU characteristics of the 28 nm SRAM-based FPGAs.

Based on Fig. 2 and Table 3, the extracted logical sizes and shapes of the MCUs are presented in Table 4. We obtained diverse (up to 9-bit) MCU patterns based on the selection of the worst irradiation parameters; these MCU data can support an effective radiation hardening process under a harsh space environment. It is important to note that,because of the statistical distribution nature presented in this paper, this method can be applied to arbitrary memory-based devices. If other types of FPGAs are irradiated, the MCU results can be easily obtained by changingXandYin Eq. (3).For the same generation of Xilinx FPGAs, owing to the same process technologies, the MCU information presented in Table 4 can be directly used to distinguish the MCU-induced cross-sections and failures.

Fig. 3 (Color online) Detailed SBU and MCU results of a 78Kr ion and b 129Xe ion irradiation

The percentages of MCUs of different sizes are presented in Fig. 4a (for78Kr ions) and Fig. 4b (for129Xe ions). It is clear that for the high LET129Xe ions, approximately 60% MCUs were the major problem for aerospace electronic systems. In Figs. 4a, b, an apparent percentage dependence of the large (more than 3-bit) MCUs on the LET and tilts was observed, and the good consistency indicated that the MCU distinction method is suitable for high-density FPGAs. Under the same LET, all large offsets(i.e., large MCUs) were generated under tilted incidence,which also proved the effectiveness of the MCU extraction method.

Additionally, for the129Xe ion irradiation, 7-bit MCUs were observed in the (90°, 30°) directions; however, under the (0°, 30°) incidence, the offset (1, 4) helped identify the largest 8-bit MCUs. Forθorψvarying from 0° to 45°, the percentages of the largest MCUs increased by 5—6 times,demonstrating that there are indeed different layout distances in the different directional irradiations. Moreover, large(more than 4-bit) MCUs appeared more frequently whenψwas equal to 30°, which identified worse tilted irradiation effects. The MCU results verified the impacts of the different sensitive region arrangements on the extracted MCU orientations, and the discrepancies of the cross-sections in different incident directions must be considered to obtain the worse and more accurate MCU responses.

Fig. 4 (Color online) Percentages and sizes of MCUs induced by a 78Kr ions and b 129Xe ions

Although the SBUs and 2-bit MCUs occupied almost the entire78Kr upset dataset, when the LET was 13.3 MeV/(mg/cm2) and the tilt was (0°, 30°), 9-bit MCUs were observed twice in an individual irradiation round. Compared with the maximum 8-bit MCUs found in the129Xe tests with the same (0°, 30°) incidence, the78Kr ion-induced larger MCUs revealed that although the high-energy heavy ions have a much smaller LET, the generated charges can still exceed the critical charge of the 28 nm FPGAs. Therefore, the78Kr ions have more severe effects than the129Xe ions, even with a considerably higher LET.

Fig. 5 (Color online) Count comparison of offsets between 78Kr and 129Xe ions, we zoomed in on the right part of Fig. 2

In fact, heavy-ion energy has a significant effect on MCUs. During the interaction of heavy ions with devices,a region formally like a cylinder, called the ionization track, is created along the path of heavy-ion incidence to deposit energy in the memory cells. There are two important parameters in this region. One is the radius, which identifies the range that the heavy ions can affect, and the other is the density of electron—hole pairs inside the ionization track, which determines the collected charge. Any cells within this track will be upset once their collected charge is equal to or greater than the critical charge. As reported in[27], heavy ions with higher energies have wider ionization tracks; this is because they can transfer more energy to the target atoms by the direct ionization process. These secondary atoms have higher kinetic energy that affects the subsequent atoms, finally generating a wider ionization track.In our testing scheme, because the78Kr ions at the LET of 13.3 MeV/(mg/cm2) had considerably higher energy than the129Xe ions, their wider ionization track can affect more cells. However, it should be noted that compared to the129Xe ions, the density of the electron—hole pairs inside the ionization track of the78Kr ions is lower. This is because the78Kr ions have a smaller LET (LET corresponds to the density of the electron—hole pairs). Therefore, the78Kr ions have a smaller probability of inducing cells to be upset exactly at the edge of the ionization track, which exceeds the critical charge of the 28 nm technology. However, in modern scaling devices, because the critical charge of cells is sufficiently low, these cells are more prone to be upset to generate large MCUs, which is the reason why we observed the largest 9-bit MCUs. Therefore, to avoid underestimating the MCU sensitivity, high-energy heavy ions are necessary for the evaluation of advanced devices.

We further compared the offset counts between the78Kr and129Xe ions in Fig. 2 and 5 to better understand the more serious influences of high-energy heavy ions. As shown in Fig. 2, the number of offsets (1, 1), (1, 0), (0, 1), (1, —1),(0, 2), and (1, 2) exceeded the separate cut-down values for both the78Kr and129Xe heavy ions. Although the number of offsets of the78Kr irradiation was less than that of the129Xe ions, except for (2, 0), (2, −1), (2, 1), (3, 0), and (3, 1); the worse effects of the78Kr ions were determined by finding a comparable number of offsets to the129Xe ions.

Fig. 6 (Color online) Percentages of large offsets at incidences of a θ = 90° and b ψ = 30° in 129Xe radiation tests

In Fig. 5, the offsets (2, 0), (2, −1), (2, 1), (3, 0), and (3,1) of the129Xe ions appeared more frequently than those of the78Kr ions. To determine the causes of this phenomenon, Fig. 6a illustrates the percentages of the large lateral offsets of the129Xe radiation tests at various tilts. It can be observed that the offset (2, 0) percentages were almost the same (approximately 15%) for all the conditions, indicating that the129Xe ions can simultaneously affect cells with a logically lateral distance of 3. Additionally, asψincreased,the remaining offsets appeared more frequently, proving that large lateral offsets were indeed induced byθ= 90°.Because we only irradiated our DUT with high-energy heavy ions in theθ= 0° direction, these large lateral offsets rarely occurred.

When radiating the DUT in variousθdirections, a similar conclusion can be made from Fig. 6b; that is, the increased azimuth angles can induce larger offset percentages in the longitudinal orientation. When comparing the offset distances between (90°, 30°) and (0°, 30°) in Fig. 6, the largest offset (1, 4) revealed the worst MCU sensitivities whenθwas equal to 0°, which is in good agreement with the largest 8-bit MCUs found in the129Xe radiation tests at (0°, 30°).The offsets in the longitude were larger than those in the lateral direction, demonstrating that the word direction was more sensitive than that between words.

As mentioned above, because irradiations underθ= 0°can cause the largest longitudinal offsets, the numbers of offsets (1, 2), (1, −2), (0, 3), (1, 3), (0, 4), and (1, 4) of the78Kr data were almost the same as that of the129Xe ions. It can be inferred that high-energy heavy ions in the rotatedθdirections generate larger MCUs (more than 9-bit) by creating larger lateral offsets.

For modern scaling devices, the energy, LET, tilts, and irradiation directions are becoming serious issues in irradiation evaluations. Under tilted incidence, it is predicted that,as the ionization ability of high-energy heavy ions increases,the sizes and proportions of the MCUs will dramatically increase, which will seriously affect the function of FPGAbased on-orbit systems, which must be considered. Additionally, based on the worse 9-bit MCUs observed in the highenergy tests, high-energy heavy ions are recommended to fully characterize the MCUs during ground-based accelerator radiation tests. With the help of the general MCU distinction methods, more serious MCU impacts were accurately determined according to the worse irradiation evaluation.Moreover, as illustrated in Fig. 6, the selection of various directional evaluation schemes affects both the OS content and MCU features owing to the different ion energy transfer trajectories. Therefore, diverse MCUs in different directions should also be considered by hardening designers.

4 Conclusion

In this study, systematic medium-energy129Xe and highenergy78Kr ion tests under different irradiation directions were performed to evaluate the negative effects of MCU.Additionally, the MCU extraction and classification of the 28 nm SRAM-based FPGAs were successfully proposed,and the detailed MCU shapes, sizes, and frequencies were presented.

Based on the statistical MCU identification methods, off-sets that did not match the predictive model were extracted to construct the MCUs. Some offsets that appeared to be less than the cut-down value were further determined by checking whether the MCUs appeared more than 2 times.A restriction of less than 0.05 in Eq. (6) enables the MCU extraction method to achieve more than 95% confidence.The detailed SBU, MCU results, and extracted large offsets revealed and demonstrated the worse sensitivity differences(offset orientations) in different irradiation tilts and directions, and further identified the 9-bit MCUs caused by the negative impacts of high-energy heavy ions on the 28 nm FPGAs. Therefore, the use of high-energy heavy ions to evaluate scaling devices for the worse MCU sensitivities was necessary.

Worse radiation evaluations and detailed MCU extractions are indispensable for preapplied digital circuits in harsh space environments. The worse MCU data and detailed analysis presented in this paper can be used to perform targeted hardened strategies to mitigate destructive MCUs and further control soft error rates.

Author contributionsAll authors contributed to the study conception and design. Material preparation, data collection and analysis were performed by Shuai Gao, Xin-Yu Li and Ze He. The first draft of the manuscript was written by Shuai Gao and Chang Cai, and all authors commented on previous versions of the manuscript. All authors read and approved the final manuscript.