Effect of electrical contact on performance of WSe2 field effect transistors∗

Yi-Di Pang(庞奕荻), En-Xiu Wu(武恩秀), Zhi-Hao Xu(徐志昊), Xiao-Dong Hu(胡晓东),Sen Wu(吴森), Lin-Yan Xu(徐临燕), and Jing Liu(刘晶)

State Key Laboratory of Precision Measurement Technology and Instruments,School of Precision Instruments and Opto-electronics Engineering,Tianjin University,Tianjin 300072,China

Keywords: two-dimensional materials, tungsten diselenide, metal-insulator transition, Schottky barrier, contact

1. Introduction

Since the discovery of graphene in 2004, twodimensional (2D) layered materials have been widely studied to develop next-generation electronics and optoelectornics, due to their premium electrical and optoelectrical properties.[1–4]However, as compared to traditional bulk semiconductors,performance of 2D material based devices is more easily affected by fabrication processes/techniques, because of their large surface-to-volume ratio and atomically thin thickness.[5,6]One of the key factors to ensure decent performance of 2D material devices is maintaining good electrical contact between the channel material and electrodes. Currently, 2D material based devices mainly use metal as the contact electrode, which usually involves e-beam lithography(EBL)and metal deposition processes. These fabrication processes inevitably introduce residues and/or defects to the crystal, leading to interface charge trapping and even Fermi level pinning effect.[7,8]Furthermore, Schottky barrier is highly likely to be formed due to the mismatch between the work function of metal electrode and the Fermi level of the channel material. Various methods have been proposed to optimize the contact between metal and the channel materials, such as choosing metals with appropriate work functions,[6,9]phase engineering,[10]using metal-insulator-semiconductor (MIS)structure,[11,12]and high temperature annealing.[13]

Besides metal contact,2D graphene has also been used as contact electrodes for 2D material devices by stacking it on the channel material.[14,15]As a semi-metal, graphene possesses good conductivity and high carrier mobility to be a promising candidate for contact.[16]Meanwhile, the process of fabricating graphene contact is free of residues and defects,minimizing charge trapping and/or Fermi pinning effect. Consequently,2D material based devices using graphene as contact may preferably present the intrinsic properties of channel materials. This is especially important to study the properties of TMDCs,which exhibit various excellent and interesting physical features.

One of the interesting characteristics observed in several TMDCs is the metal-insulator-transition (MIT)phenomenon,[7,8]which is still under active research to reveal its mechanism. Although it has many potential applications including resistive switching,ultrafast photocurrent switching and neuromorphic computation,[17,18]the MIT phenomenon can only be observed under certain strictly regulated conditions, and good electrical contact may be one of such conditions.

In this work,we fabricated the multi-layered WSe2FETs with graphene and Cr/Au as contacts, respectively, and systematically compared their performances. Both devices show ambipolar characteristics with the current on/off ratio greater than 106at room temperature. However, only graphenecontacted device was observed with the MIT phenomenon.Furthermore, we analyze the transport characteristics of both devices under various temperatures to calculate the Schottky barrier height for the two types of contacts. As compared to metal-contacted devices,the graphene-contacted device has a much lower barrier height under appropriate gate voltage and higher field effect mobility. We finally investigate the effect of carrier scattering on the carrier field-effect mobility of both devices through temperature-dependent experiment.Our work may provide a fundamental insight into the effect of electrode contact on the performance of TMDCs based devices.

2. Experiments

2.1. Device fabrication

Multi-layered WSe2and graphene flakes were mechanically exfoliated by a piece of tape from their bulk crystals and then transferred onto a p-doped Si substrate covered with 285 nm thermally grown SiO2.[19]The WSe2flakes were used as the channel material with thickness of around 9.2 nm.Graphene flakes and metal were used as electrodes to fabricate graphene-contacted and metal-contacted WSe2devices,respectively. Graphene contacts were made by stacking two graphene flakes on two opposite sides of a WSe2flake,which was then deposited with metal electrodes. The metal electrodes were defined by EBL, followed by depositing 10 nm Cr and 30 nm Au films sequentially on the WSe2flake using e-beam evaporation. Standard lift-off process was then performed to complete the metal electrode fabrication.

2.2. Sample characterization

The Raman spectra were obtained by a Renishaw InVia Raman microscope with incident laser intensity of∼1.38 mW at 532 nm. The thickness of these materials was characterized by an atomic force microscope(AFM)(Dimension Icon,Bruker, Germany) in tapping mode. The electrical characteristics of the WSe2devices were inspected by a semiconductor parameter analyzer B1500 (Agilent, USA). The low temperature electrical test environment was realized using the low temperature probe station of CRX-6.5K(Lake Shore,USA).

3. Results and discussion

Figures 1(a)and(b)show the schematic and optical image of the graphene-contacted WSe2device, respectively. All the WSe2flakes used in this work were mechanically exfoliated from the same bulk crystal, which were then transferred on SiO2/Si substrates with a 285-nm-thick SiO2dielectric layer.

Fig.1. Characterization of two devices with different contacts. (a)Schematic of the graphene-contacted WSe2 device. (b)Optical image of the graphenecontacted WSe2 device. Inset: the height profile of the WSe2 measured along green line. (c)Schematic diagram of the Cr/Au-contacted WSe2 device. (d)Optical image of the Cr/Au-WSe2 FET. Inset: the height profile the WSe2 measured along red line. (e) Raman spectra of WSe2 (green line), graphene(orange line)and the overlapped region(blue line)for the graphene-contacted WSe2 device. (f)Raman spectra of the WSe2 for Cr/Au-WSe2 FET.

Fig.2. Electrical characterization of graphene-and metal-contacted WSe2 devices. Transfer curves of(a)graphene-contacted and(c)Cr/Aucontacted WSe2 FETs in linear(solid line)and logarithm(dashed line)scales.Output curves of(b)graphene-contacted and(d)Cr/Au-contacted WSe2 FETs under different Vgs as Vds sweeps from −2 V to 2 V.Inset: the output curve of the Cr/Au-contacted WSe2 FET in vacuum at room temperature. [(e),(f)]Band alignment of the graphene-contacted WSe2 device at different gate potentials.

To fabricate graphene-contacted WSe2FET, two graphene flakes were transferred onto two sides of the WSe2flake to form van der Waals contacts, which served as the source and drain electrodes. Cr/Au was then deposited on the graphene flakes to connect to the test terminals. The gate voltage was applied through heavily doped Si substrate as back-gate electrode. The thickness of the WSe2flake and two graphene flakes were measured to be 9.2 nm, 11.6 nm and 5.4 nm, respectively, by AFM. Figure 1(e) shows the Raman spectra of WSe2(green line), graphene (orange line)and WSe2/graphene overlapped region (blue line), in which characteristic Raman peaks of WSe2and graphene were observed and consistent with previously reported results.[20,21]Figures 1(c) and 1(d) are the schematic and optical image of Cr/Au-contacted WSe2FET, respectively. The fabrication of Cr/Au-contacted WSe2FET was the same as the process of making graphene-contacted WSe2FET, except that no graphene flakes were stacked on WSe2. The AFM height profile identified the thickness of the WSe2flake to be 8.2 nm.Figure 1(f) presents the Raman spectrum of the WSe2used in the Cr/Au-contacted device, in which the characteristic peak positions were perfectly consistent with the previous reports.[21]

Figures 2(a)–2(d)present the transfer and output characteristics of graphene-and Cr/Au-contacted WSe2devices,respectively. The transfer curve of the graphene-contacted device underVdsbias of 2 V is shown in both linear(solid line)and logarithm (dashed line) scales in Fig. 2(a). As gate voltage swept from−60 V to 60 V,the device exhibits ambipolar behavior, withIonaround 16.5 µA at−60 V andIon/Ioffratio more than 106. Figure 2(b)shows the output curve of the same device in Fig.2(a)under differentVgsasVdssweeps from−2 V to 2 V.The output curves are highly asymmetric,which attributes to the asymmetric heterojunction formed at the interface of graphene and WSe2. Since van der Waals contacts can minimize interface defects and charge traps, the current value in output curve matches the current value in the transfer curve under the same biasesVgsandVds. Figures 2(e)and 2(f) illustrate the band alignment of the graphene-contacted WSe2device under gate bias of−60 V and +60 V. Specifically,when a high negative gate potential is applied,the work function of graphene and the Fermi level of WSe2shift to the valence band,which induces the band bending making the relative Schottky barrier height lower. As a result, holes can be injected into the valence band more easily. Conversely, the graphene work function and the Fermi level of WSe2are modulated in opposite directions under high positive gate voltage.Under this condition, the Fermi level of WSe2is close to the conduction band, and the small barrier height helps electron injection. On the other hand, the transfer curve of the metalcontacted WSe2FET is shown in Fig. 2(c), which was obtained under the same ambient conditions. As compared to the graphene-contacted device,this device also shows ambipolar behavior and on-off ratio greater than 106withIonaround 14.9 µA at 60 V gate bias. The output curve of this FET is shown in Fig. 2(d), which becomes more symmetric than the curves obtained from graphene-contacted FET. Nevertheless,discrepancy inIdsis observed under the sameVgsandVdsbiases between the output and the transfer curves. This is ascribed to the hysteresis characteristics of the device caused by charge trap and release at the interface between metal and channel material, which can be suppressed in a vacuum. The inset in Fig. 2(d) shows the output characteristics measured under 60 V gate bias in vacuum at room temperature, which can well match the current in transfer characteristics as gate voltage sweeps to 60 V. The dimension-dependent electrical performance of the WSe2device should also be considered.Regarding to the thickness,single-layer and multi-layer WSe2have direct and indirect band gap, respectively, which have differences in electron-hole recombination and luminous efficiency. Moreover,as compared to the devices made of singlelayer WSe2, devices made of multi-layer WSe2show statistically higher mobility.[22]In this article, all the WSe2flakes are multi-layer with similar thicknesses of several nanometers to minimize the impact of thickness on the electrical performance. Meanwhile, the shape and size of the WSe2devices between electrodes are square ranging from tens of square microns to hundreds of square microns. In the following experiment,we use the carrier mobility as a key parameter to characterize the device electrical performance, which normalizes the influence of the channel size.

To investigate the contact mechanism, the temperaturedependent transfer curves of the graphene-contacted WSe2device in both linear (solid line) and logarithm (dashed line)scales are presented in Fig. 3(a). Generally, the device has higherIdsvalue and on/off ratio compared to the result in Fig. 2(a). Since the temperature-dependent tests were carried out in a vacuum chamber, the adsorption of charge accepters such as water vapor and oxygen was inhibited. In addition, the channel current of the device changed differently with temperature,when the gate was negatively and positively biased. Specifically,theIdsdecreased with increasing temperature when the gate voltage was negative,indicating a typical metallic state. In contrast,when the gate voltage was positive,theIdsincreased with increasing temperature, corresponding to an insulating state.This phenomenon indicates the presence of MIT in this device. Figure 3(b)presents the conductanceGof the device as a function of temperature under different gate biases extracted from Fig. 3(a). We can clearly observe that in the metal phase region, the conductance decreases as the temperature increases, while in the insulating phase the conductance increases with temperature increases. The inset of Fig.3(b)shows the locally enlarged view of conductance under different positive gate voltages.

On the contrary,the MIT phenomenon was not observed in metal-contacted WSe2devices. Figure 3(c) shows the temperature-dependent transfer characteristics of the Cr/Aucontacted WSe2FET. When the gate voltage sweeps from−60 V to 60 V, theIdsincreases as the temperature increases, showing the traditional semiconducting behavior.From Fig. 3(c), the conductance of the device as a function of temperature under different gate voltages is extracted and plotted in Fig. 3(d). As compared with Fig. 3(b) (graphenecontacted WSe2FET),the conductance of the metal-contacted WSe2FET increases with the temperature, regardless of the variation of gate bias. This may be due to the fact that the MIT phenomenon can be easily screened by the influence of the Schottky barrier at the contact interface between metal and channel material.

In order to verify this point of view, we calculate the Schottky barriers of these two structures under different gate biases. When 2D thermionic emission dominates the transport behavior of 2D devices,the following equation can be used to describe the process:

whereA∗2D=4πqm∗k2Bh−3is the 2D equivalent Richardson constant,m∗is the effective mass,his Planck’s constant,Tis the absolute temperature,qis the elementary charge,ΦBis the Schottky barrier height,andkBis the Boltzmann constant,Vdsis 2 V.We then draw the Arrhenius plot and linearly fit it to derive the Schottky barrier height according the equation.Figures 4(a) and 4(b) plot the linear fit of ln(Ids/T3/2) versus 1000/Tat negative back-gate voltage and positive backgate voltage for the graphene-contacted device, respectively.The good agreement of the experimental data with the fitting curve means that the carrier transport follows the thermally activated model. Moreover, the slope of the fitting curves in the Arrhenius plot indicates the phase of the device: positive slope indicates metallic phase, while negative slope corresponds to insulating phase. In addition, as the gate voltage sweeps from−60 V to 60 V,the absolute value of the slope of the fitting curve first increases and then decreases. Based on the same electron thermionic emission model, Figs. 4(c) and 4(d) show the Arrhenius plot and linear fitting results of the Cr/Au-contacted WSe2FET under different gate biases. Different from the graphene-contacted device, the slopes of the fitting curves for the Cr/Au-contacted WSe2FET are all positive under both negative and positive gate biases, indicating insulating property. However, it is similar to the graphenecontacted device that the slope of the fitting curves reaches the maximum value withinVgssweeping from−60 V to 60 V.According to the slope of each fitting line, we extract the effective Schottky barrier heights of the graphene-contacted and Cr/Au-contacted WSe2FETs as a function of gate bias,which are presented in Figs. 4(e) and 4(f), respectively. Obviously,the effective Schottky barrier heights of both the devices are tunable by the gate voltage,which decrease as the amplitude of the gate voltage increases. The barrier-gate voltage curves for both graphene-contacted and Cr/Au-contacted devices can be divided into two branches.In the left branch of the curves(under negative gate bias), the majority carriers are holes, while in the right branch of the curves the majority carriers are electrons. Furthermore,the electrical transport in the linear part of each branch is dominated by the thermal emission. When the tunneling current is not negligible,the curve will deviate from the linear region. We fit the linear parts of the two branches of the two curves and extract theΦBat the demarcation point of the linear fit and nonlinear part. For the graphene-contacted device corresponding to Fig. 4(e), the barrier heights of the electron and hole are 43 meV and 65 meV, respectively. In contrast, for the metal-contacted FET in Fig. 4(f), the barrier heights are 155 meV and 162 meV for electron and hole, respectively. Therefore, contact barrier between graphene and WSe2is much lower than that between Cr/Au and WSe2, resulting in the observable MIT phenomenon.

Fig.3. Temperature-dependent electrical properties of graphene-and metal-contacted WSe2 devices. (a)Temperature-dependent transfer curve of the graphene-contacted WSe2 device. (b)Conductance versus temperature curve of the graphene-contacted WSe2 device. Inset: a locally enlarged view of conductance versus temperature curve under different positive gate voltages. (c) Temperature-dependent transfer and (d)conductance curves of the Cr/Au-contacted WSe2 FET.

Since reducing the height of the contact barrier facilitates charge transport,we further explore the influence of graphene contact on the electrical properties of the device from the perspective of carrier mobility. We calculate the field-effect mobility according to the following formula:

whereµis the field-effect mobility,LandWare the channel length and width,respectively,Ci=ε0εr/dis the capacitance between the channel and the back gate(ε0is the permittivity in vacuum,εris 3.9 for SiO2anddis the thickness of the dielectric layer of 285 nm). We derive the carrier field-effect mobility as a function of temperature for the graphene-contacted and Cr/Au-contacted WSe2devices in Figs. 5(a) and 5(b),respectively. In the entire temperature range, the graphenecontacted device has higher carrier mobility than the metalcontacted device,further indicating the optimization of electrical performance by graphene contact. Meanwhile, the difference in mobility at different temperatures give us insight into the mobility-limiting scattering mechanism. The experimental limitation of field-effect mobility is usually caused by the presence of scattering sources and disorder.In the low temperature region,the mobility is mainly affected by the contact resistance and the charge impurity scattering. For the graphenecontacted WSe2device,the mobility is relatively stable under 200 K,which means that no significant degradation is caused by charge scattering. However,for the Cr/Au-contacted WSe2device,the mobility decreases with the decreasing temperature in the low temperature range. In this situation, the scattering probability caused by ionized impurities increases with the decrease of temperature,and as a result,the carrier mobility also decreases with temperature leading to deterioration of device performance. On the other hand,in the phonon limited region,the carrier mobility decreases with increasing temperature due to the increased number of phonon modes, which fits the expressionµ=T−γ. The positive power-law correlation is consistent with the performance of other materials,which demonstrates that the phonon scattering mechanism is satisfied.[7,23]The exponentγindirectly reflects the effect of the phonon limitation,which is 2.21 and 0.93 for the graphene-contacted and Cr/Au-contacted WSe2devices, respectively. Although it degrades faster in the region dominated by phonon scattering,the carrier mobility of the graphene-contacted WSe2device maintains a value higher than that of the Cr/Au-contacted WSe2device.

Fig.4. Arrhenius plots and Schottky barrier of graphene-and metal-contacted WSe2 devices. [(a), (b)]The linear fit of ln(Ids/T3/2)versus 1000/T at negative (a) and positive (b) back-gate voltage for the graphene-contacted device. [(c), (d)] The linear fit of ln(Ids/T3/2) versus 1000/T at negative (c) and positive (d) back-gate voltage for the Cr/Au-contacted device. [(e), (f)] Effective Schottky barrier height as a function of gate bias for the graphene-contacted(e)and Cr/Au-contacted(f)FETs.

Fig.5. Carrier mobility as a function of temperature in the logarithmic scale for(a)the graphene-contacted and(b)Cr/Au-contacted devices.

In general, the graphene-contacted WSe2device shows better performance than the metal-contacted device due to two reasons. From the perspective of device fabrication,there are no dangling bonds on the surface of two-dimensional materials, and the graphene and WSe2are combined by van der Waals force to avoid the defects and residues caused by EBL and metal deposition. The defects at the interface between WSe2and metal are expected to affect the Schottky barrier.Firstly, defects may prevent good physical contact, and thus,electrical contact between WSe2and metal. Secondly, the conventional method to form near-ohmic contact between a semiconductor and a metal is to heavily dope the semiconductor, so that electrons can easily tunnel through the contact barrier. The defects may induce defect states and affect the doping level of WSe2. The metal deposition process inevitably induces defects on the WSe2surface,resulting in the change of the Schottky barrier. Therefore, graphene contact to WSe2can create a more controllable and cleaner interface than metal contact. In addition, the Fermi level of graphene contacts can be effectively modified by the back-gate voltage to match the Fermi level of WSe2, so that the contact barrier between graphene and WSe2is significantly reduced and carrier mobility is thus increased.

4. Conclusion

In summary, we have fabricated the WSe2FETs with graphene and Cr/Au as contact electrodes,respectively,to analyze the effect of contact on device performance. In our experiments, only the graphene-contacted device is observed with the MIT phenomenon,which may be attributed to its ultraclean contact interface and low contact barrier. In detail,the contact barriers of the graphene-contacted device for electrons and holes are as low as 43 meV and 65 meV, respectively, which are significantly lower than the values of the metal-contacted FET(155 meV for electrons and 162 meV for holes). We also analyze the influence of carrier scattering on the device transport behavior under different temperatures,indicating that graphene contact reduces the charge scattering of the device caused by ionized impurities and phonon vibrations in low and room temperature regions,respectively. Our work may provide important reference for further development of high-performance 2D material based electronic devices.