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A virtual lock-in amplifier, spectrum analyzer, impedance meter and semiconductor analyzer implemented on an SR7265 hardware target

2018-03-23BAIJianghuaFreeoufJohnAndresLaRosa

BAI Jiang-hua, Freeouf L John, Andres La Rosa

(Dept. of Physics, Portland State University, OR 97201, USA)

1 Principle of a typical dual phase lock-in amplifier

Fig.1 shows an illustration of a typical lock-in amplifier. The lock-in amplifier, at first, amplifies the input signal, then multiplies the input signal by a pure cosine and sine wave at the reference frequency. All components of the input signal are multiplied by the reference simultaneously. Theoretically, cosine and sine waves of different frequencies are orthogonal, i.e. the average of the product of two sine or cosine waves is zero unless the frequencies are exactly the same. The product of this multiplication yields a direct current (DC) output signal proportional to the power of the signal component, whose frequency is exactly locked to the reference frequency. But the multiplier is not ideal, and there is a high-frequency term after the multiplications. A low pass filter is used to control the bandwidth around the reference frequencies and remove the high-frequency term of the multiplier’s output[1-2]. After the low pass filters, an output buffer is used to output the final results,X,Y,Randθ. The freehand lines in Fig.2 show the signal flow paths of the whole process.

Fig.1 Functional block of a dual phase lock-in amplifier

The mathematical details are shown below.

Suppose that the amplified input signal flowing into the phase sensitive detector (PSD) is modeled by

(1)

whereViandθiare the amplitude and phase of the signal component respectively at frequency ofωi. The PSDs multiply the reference signal with the input signal. Along the in phase signal flow path in Fig.2, the multiplication result is

whereωtandθrare the angular frequency and phase of the reference signal.

Fig.2 Signal flows of a dual phase lock-in amplifier

Following the trigonometrical identities, we can obtain

cos(ωit-ωrt+θi-θr)].

(2)

Then the signal flows into the low pass filter, which removes the high-frequency term, then we can get

(3)

As long asωi≠ωr, cos(ωit-ωrt+θi-θr) is also an AC signal, which will be averaged to zero by the low pass filter. Indeed the final result shown at the terminalXis

(4)

Similarly, along the quadrature signal flow path, the PSD produces

(5)

With the trigonometrical identities,

sin(ωit+ωrt+θr+θi)].

(6)

After the low pass filter,

(7)

By properly setting the time constant, the DC signal shown at theYterminal is

(8)

From the calculations above, we can see the input consists of signal plus noise. Noise is represented as varying signals at all frequencies. The ideal lock-in only responds to noise at the reference frequency. Noise at other frequencies is removed by the low pass filter following the multiplier. Bandwidth narrowing is the primary advantage of a lock-in amplifier. Only signal components at the reference frequency result in an output. Thus this signal is singled out, even if it is buried by noise thousands of times larger at other frequencies[1-6].

If the result is represented in a polar form, we have

(9)

2 Principle of a typical virtual lock-in amplifier

With the digital signal processing (DSP) technology employed in modern instrumentation, the major signal flow part can be implemented into a DSP. The functional block is shown in Fig.3.

Fig.3 Functional block of a DSP lock-in amplifier

In virtual instrumentation, everything is controlled by a computer. We do not need to output the real signals ofX,Y,R,θ, and then measure and input them to the controller again. Instead, the information ofX,Y,R,θcan be stored into the DSP FIFO, from which the controller can read directly. By this way, one does not need the digital to analog converter (DAC), signal regulation and amplifier parts to output the results, which is another advantage of virtual instrumentation. The functional block of a virtual lock-in amplifier is basically as shown in Fig.4.

Fig.4 Functional block of a virtual lock-in amplifier

From Fig.4, we can see, with virtual instrumentation, the digital lock-in amplifier is fully controlled by the computer, which makes the whole system cheaper, faster and more accurate. Furtherly, other instruments depending on the lock-in outputs can be controlled by the same computer. From the view of system integration, virtual instrumentation makes the system flexible, scalable and easy to use.

3 Implementation of virtual lock-in amplifier on an SR7265 target

One of the easiest ways to build virtual lock-in amplifiers is to combine the virtual instrumentation technology with a standalone lock-in amplifier with computer interfaces. We can implement the virtual lock-in amplifier algorisms with LabVIEW, then control the target hardware by RS232, GPIB or USB interfaces. Fig.5 shows the basic idea of a virtual lock-in amplifier implementation. The benefit of this approach is that a unified user interface and functional block can be established. After all the functional blocks are fully verified and tested, the same virtual lock-in amplifier can be implemented in other commercial products, analog products or a house-made lock-in amplifier with various technologies, such as FPGA, ARM and DSP.

Fig.5 Direct implementation of virtual lock-in amplifier on an SR7265 target

4 System architecture of virtual instrument

This virtual lock-in amplifier is implemented with a 4 layer model as shown in Fig.6. The 4th layer implements the various applications, such as a lock-in amplifier, spectral analyzer, network analyzer, impedance analyzer, noise meter, semiconductor parameter analyzer, etc. The 3rd layer implements the necessary functional blocks, such as frequency sweeps, fast Fourier transform (FFT) block, complex voltage and current measurement block, etc. The 2nd layer is the commands offered by the lock-in manufacture. The 1st layer is the physical equipment.

Fig.6 Structural model of a virtual lock-in amplifier

An interesting question is why it is best to organize the virtual lock-in amplifier into a 4 layer model[7]. Suppose the instrument is organized by a 3 layer model. Then, the 3rd and 4th layers are merged together. There will be several problems. One of the problems is that different lock-in amplifiers may have different command sets. In order to fully apply the commands, the application layer may be programmed differently for different lock-in amplifiers. Finally, this may lead to a slightly different user interface and operational procedure, while we want the different hardware to share the same user interface. The other problem is that LabVIEW is graphic programming that put everything be seen. If one layer has too many functions to implement, the codes in several screens should be programmed, which makes the reading and maintenance of the codes difficult.

5 Implementation of spectrum analyzer, impedance meter and semiconductor analyzer

After the virtual lock-in amplifier is successfully implemented, its resources can be reorganized to build other virtual instruments. By calling the frequency sweep subroutine and measuring the responses, a spectrum analyzer can be built. Controlling the oscillator to power the device under test (DUT) and measuring the complex current through it, an impedance meter can be built. Programming the auxiliary inputs and outputs and lock-in core, a sophisticated semiconductor analyzer with the same hardware can be built. Due to the space limitation, the detailed algorithm is not explained here. The impedance meter information can be checked in Refs.[2,4,8,9]. Some extra knowledge about semiconductor physics to build the semiconductor analyzer can be got from Refs.[10-11].

6 Implement virtual instrument on an FPGA board

With the LabVIEW FPGA module and MATLAB coder available, it is much easier to develop a complex DSP project on an FPGA board than with traditional Verilog programming. NI7831R FPGA board is employed to carry out the Layer 1 and Layer 2 functions.

An analog interface is also employed to amplify the signals inputting to the FPGA board, and output the FPGA signals to the DUT. The system block is shown in Fig.7 and the system structure is shown in Fig.8. Details for how to program the FPGA board and how to design the diff amp can be checked in Ref.[12].

Fig.7 Block diagram of the virtual instruments targeted on an FPGA board

Fig.8 Structural model of virtual instrument implemented on an FPGA board

7 User interface

The software is important for any virtual instrument. A good virtual instrument should be strong, fault tolerant, intuitive and intelligent. Some of the users may not have sufficient computer science background. So, here, we briefly describe the software with the layered model in mind. One may get some clues from this section and develop his own complicated application with virtual instrumentation technology in Refs.[7-9].

Fig.9 shows the lock-in amplifier user interface. The virtual lock-in amplifier tab offers a wide frequency range sweep, a fine sweep, basic lock-in setup and data displays. The top windows display the amplitude responses and the bottom windows display the phase responses. During the operation, users first take a rough frequency sweep to find the interest frequency range, then click the button STOP1. The interest frequency range will be passed to the right area. The frequency spans can be changed by DF1 and DF2 controls. After the fine sweep, the lock-in amplifier will lock to the peak frequency. The default mode is Auto Lock-In. By clicking the Auto Lock-In button, auto mode and manual mode can be switched. Under the manual mode, when set the frequency at the ManualFrq control, the lock-in amplifier will lock to the frequency. The virtual lock-in amplifier communicates with the hardware through GPIB or USB. The BusDelay control sets the bus update time in milliseconds. OscAmp sets the amplitude of the excitation oscillator. TimeCons and Sensitivity controls are pulldown menus for time constant and sensitivity setups.X,Y,Rare displays of the results as Fig.3 shown.

Fig.9 User interface of virtual lock-in amplifier

The spectrum analyzer tab has a similar style as the virtual lock-in amplifier, as shown in Fig.10. The top windows display the amplitude response. The bottom window displays the phase response. An extra feature is added to change the background color of the display. By clicking the little black square can change the color of the windows. If users view the spectrum on a monitor, they can set the background color to black. If users may print the spectrum on a printer, they can set the background color to white.

Fig.10 User interface of spectrum analyzer

The impedance analyzer has a similar style, as shown in Fig.11. It can measure the complex impedance around a frequency range. For detailed hardware connection to measure impedance with a lock-in amplifier can check Ref.[2].

The semiconductor analyzer tab implements PN junction test, bipolar transistor test and field-effect transistor (FET) test, as shown in Fig.12. By clicking the AC button, user can switch between high-frequency AC mode and low-frequency DC mode. By DC sweep, we can get bias, threshold, load characteristics, etc. By high-frequency sweep, junction capacitance, diffusion time, depletion curves and the device AC equivalent models can be measured. For the physics behind these measurements can read Ref.[10].

Fig.11 User interface of spectrum analyzer

Fig.12 User interface of semiconductor parameter analyzer

8 Implementation of virtual instruments

8.1 Layer 4

All the software is implemented with a 4 layer model. Fig.13 shows the layer 4 of the virtual lock-in amplifier. It is coded as a sequence. The first step sets the sensitivity, time constant and oscillator amplitude. The second step takes the rough sweep. The third step takes the fine sweep. The final step takes the actual measurements at the locked frequency.

Fig.13 Layer 4 codes of virtual lock-in amplifier

For an illustration purpose, the spectrum analyzer is coded with a mixture of Layer 4 and Layer 3 as shown in Fig.14.

The detailed procedure to take a spectrum analysis is implemented in the while loop. We can put the procedure into a subroutine.

Fig.14 Codes of virtual spectrum analyzer

The impedance analyzer is also purposely coded at Layer 3 to show the detail of the operation of the instrument, as Figs.15 and 16. An impedance analyzer needs to power the device under test (DUT) and measure its reaction continuously. At first, the instrument outputs a sinusoidal signal to the DUT, the swiftly the instrument switches to measure the voltage across the DUT and current through the DUT. By dividing the complex voltage and current, the impedance of the DUT can be gotten. The DUT needs to be wired to the differential input. The hardware connections can be found in Ref.[2].

The code for the semiconductor analyzer is even more complicated, as shown in Fig.17. Here we only briefly describe the ideas. The auxiliary outputs set the DC bias of the DUT. Then an AC signal is generated by the instrument and injected to the DUT. Finally, the instrument will measure the voltage and current at the DUT terminals. Then the results will be either displayed on the monitor or saved in a file. For different purposes, the instrument should be programmed specifically.

Fig.15 Codes of virtual impedance analyzer for variant frequencies

Fig.16 Codes of virtual impedance analyzer for a specific frequency

Fig.17 A section of the code of virtual semiconductor parameter analyzer

Fig.18 Frequency sweep function at Layer 3

Fig.19 Oscillator and signal channel setup function at Layer 3

8.2 Layer 3

Layer 3 subroutines carry out the basic functional blocks like frequency sweep (Fig.18), hardware condition setup, and signal generating and measuring (Fig.19), etc.

8.3 Layer 2

Here, a commercial lock-in amplifier is used as our hardware base. The Layer 2 of the virtual instruments are the instruction set offered by the manufacture of the lock-in amplifier. If one wants to build his own hardware with a DSP or FPGA developing board, the Layer 2 functions should be implemented in the boards directly. An interface should be built in the board to communicate with the Layer 3 subroutines programmed by LabVIEW.

8.4 Layer 1

Lock-in amplifiers are high-speed instruments. A commercial lock-in amplifier with computer interface will be a good option. Besides, a DSP board or FPGA board can be chosen to implement the basic logic as shown in Figs.1-4. Usually, an analog interface is also needed to connect the real world to the boards. For different applications, some specifications of the DSP boards should be taken care of, such as sampling rate, memory size, and signal update rate, etc.

9 Conclusion

This platform can enhance the applications of a lock-in amplifier. In addition of traditional lock-in amplifier applications, the lock-in can be used as a network analyzer, impedance analyzer, and semiconductor parameter analyzer, etc.

It is easier to deploy the virtual instrument on a commercial hardware. After this, one can deploy the instruments on DSP or FPGA developing boards to build fully house-made virtual instruments through hardware and software. Besides of functional IP cores, an efficient interface on the DSP or FPGA boards is needed to build to communicate with the LabVIEW programs running on a PC.

[1] DSP lock-in amplifier model SR830 user manual. California: Stanford Research Systems, 1999.

[2] MFLI user manual. Zurich: Zurich Instruments, 2016.

[3] Model 7265 DSP lock-in amplifier instruction manual. Berwin: AMETEK Advanced Measurement Technology Inc., 2002.

[4] MFIA user manual. Zurich: Zurich Instruments, 2016.

[5] Model 181 low-noise current preamplifier instruction manual. Berwin: AMETEK Advanced Measurement Technology Inc., 2002.

[6] Models 5105 & 5106 dual phase lock-in amplifiers instruction manual. Berwin: AMETEK Advanced Measurement Technology Inc., 2009.

[7] Bai J H, Chen J W, Freeouf J, et al. A 4-layer method of developing integrated sensor systems with Lab VIEW. Journal of Measurement Science & Instrumentation, 2013, 4(4): 307-312.

[8] Alexandre R R. Measurement of low impedances with a lock-in amplifier. [2017-12-10]. http:∥diposit.ub.edu/dspace/bitstream/2445/59951/1/TFG_Alexandre_Rius_Rueda.pdf.

[9] Kouh T, Kemiktarak U, Basarir O, et al. Measuring Gaussian noise using a lock-in amplifier. American Journal of Physics, 2014, 82(8): 778-784.

[10] Pierret R F. Semiconductor device fundamentals. New Jersey: Addison Wesley, 1996.

[11] Sze S M. Physics of semiconductor devices. New York: Wiley-Interscience, 2006.

[12] NI Community. Lock-in amplifier on LabVIEW FPGA. [2017-11-25]. https:∥forums.ni.com/t5/Example-Programs/Lock-in-Amplifier-on-LabVIEW-FPGA/ta-p/3500412.